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Patents

The Sponsors are routinely informed of new ideas developed at PSRC using patent disclosures submitted to Senior Member and Member level companies. Companies are requested to evaluate the ideas and approve patent filing in accordance with the membership agreements. Using this procedure, nearly 50 U.S. Patents have been issued based upon the work done at PSRC. These patents are listed below with a brief comment on the technology content.

1 "Integrated Circuit Power Device with Automatic Removal of Defective Devices and Method of Fabricating the Same",
Patent Number: 5,021,861, June 4, 1991.
(First wafer scale defect repair technology for manufacturing high current devices demonstrated at PSRC/NCSU by using Al fusible links integrated with MOSFETs and IGBTs)
2 "Gated Base Controlled Thyristor",
Patent Number: 5,099,300, March 24, 1992.
(The basic Base Resistance Controlled Thyristor (BRT) structure and concept demonstrated to be superior to the MCT/MOS-GTO structure at PSRC/NCSU)
3  "Base Resistance Controlled Thyristor with Single Polarity Turn-on and Turn-off Control",
Patent Number: 5,198,687, March 30, 1993
(Improved Base Resistance Controlled Thyristor (BRT) structure demonstrated to be superior to the MCT/MOS-GTO structure at PSRC/NCSU)
4 "Silicon Carbide Power MOSFET with Floating Field Ring and Floating Field Plate",
Patent Number: 5,233,215, August 3, 1993
(Basic Trench MOSFET structure with special edge termination for power switching applications)
5 "Base Resistance Controlled Thyristor with Integrated Single Polarity Gate Control",
Patent Number: 5,241,194, August 31, 1993.
(Improved Base Resistance Controlled Thyristor (BRT) structure with buried insulator demonstrated using SIMOX technology to be superior to the MCT/MOS-GTO concept at PSRC/NCSU)
6 "Merged PiN/Schottky Power Rectifier having extended PiN Junction",
Patent Number: 5,241,195, August 31, 1993.
(Improved JBS and MPS structures using P+ regions on trench sidewalls)
7 "Schottky Barrier Rectifier including Schottky Barrier Regions of Differing Barrier Heights",
Patent Number: 5,262,668, November 16, 1993.
(SiC Schottky Rectifier with reduced leakage current without P-implantation. Named TSBS in PSRC/NCSU papers)
8 "Method of Forming an Oxide Filled Trench in Silicon Carbide",
Patent Number: 5,270,244, December 14, 1993.
(Enhanced Oxidation rate process for SiC, demonstrated experimentally by PSRC/NCSU)
9 "Emitter Switched Thyristor without Parasitic Thyristor Latch-up Susceptibility",
Patent Number: 5,293,054, March 8, 1994.
(Improved EST structure with MOS-gate controlled current saturation capability for high voltage applications demonstrated at PSRC/NCSU)
10 "Unit Cell Arrangement for Emitter Switched Thyristor with Base Resistance Control",
Patent Number: 5,294,816, March 15, 1994.
(Improved EST structure with MOS-gate controlled current saturation capability for high voltage applications demonstrated at PSRC/NCSU)
11 "Integrated Multicelled Semiconductor Switching Device for High Current Applications",
Patent Number: 5,296,725, March 22, 1994.
(Improved EST structure with MOS-gate controlled current saturation capability for high voltage applications demonstrated at PSRC/NCSU)
12 "Emitter Switched Thyristor with Buried Dielectric Layer",
Patent Number: 5,306,930, April 26, 1994.
(Improved selective SIMOX technology based EST structure with MOS-gate controlled current saturation capability for high voltage applications demonstrated at PSRC/NCSU)
13 "MOS Gated Thyristor with Remote Turn-off Electrode",
Patent Number: 5, 317,171, May 31, 1994.
(Improved EST structure with MOS-gate controlled current saturation capability for high voltage applications demonstrated at PSRC/NCSU)
14 "Method of Forming a P-N Junction in Silicon Carbide",
Patent Number: 5,318,915, June 7, 1994.
(Enhanced Diffusion rate process for SiC)
15 "MOS Gated Thyristor having On-State Current Saturation Capability",
Patent Number: 5,319,222, June 7, 1994.
(Improved EST structure demonstrated at PSRC/NCSU)
16 "Method of Fabricating Silicon Carbide Field Effect Transistor",
Patent Number: 5,322,802, June 21, 1994.
(Method for making Planar MOSFET with displaced P-base and N+ source implants)
17 "Silicon Carbide Field Effect Device",
Patent Number: 5,323,040, June 21, 1994.
(Trench Gate ACCUFET structure)
18 "Silicon Carbide Field Effect Transistor",
Patent Number: 5,338,945, August 16, 1994.
(Planar MOSFET Structure with displaced P-base and N+ source implants)
19 "Schottky Barrier Rectifier with MOS Trench",
Patent Number: 5,365,102, November 15, 1994.
(Basic TMBS Schottky rectifier structure demonstrated at PSRC/NCSU)
20 "Integrated Circuit Power Device with Transient Responsive Current Limiting means",
Patent Number: 5,392,187, February 21, 1995.
(Second wafer scale defect repair technology for manufacturing high current devices demonstrated at PSRC/NCSU by using Al fusible links integrated with MOSFETs and IGBTs)
21 "Silicon Carbide Switching Device with Rectifying Gate",
Patent Number: 5,396,085, March 7, 1995.
(The “Baliga-Pair” transistor combination, which combines a low voltage (preferably Silicon) MOSFET and a high voltage SiC MESFET, to create an excellent power switch with fly-back rectifier, demonstrated to have excellent switching losses. The patent also has claims on the integrated SiC device structure.)
22 "Insulated Gate Bipolar Transistor with reduced susceptibility to parasitic latch-up",
Patent Number: 5,396,087, March 7, 1995.
(Improved elective SIMOX based IGBT structure demonstrated at PSRC/NCSU)
23 "High Voltage Silicon Carbide MESFETs and Method of Fabricating Same",
Patent Number: 5,399,883, March 21, 1995.
(Lateral High Voltage MESFET structure for Power ICs)
24 "Multifunctional Semiconductor Device having Gate-Controlled Regenerative and Non-regenerative Conduction Modes, Method of Operating Same",
Patent Number: 5,412,228, May 2, 1995.
(Monolithic combination of BRT and IGBT to reduce on-state and switching losses demonstrated at PSRC/NCSU)
25 "Trench Gate Lateral MOSFET",
Patent Number: 5,434,435, July 18, 1995.
(High cell density lateral MOSFET structure for Power ICs)
26 "Method of forming Trenches in Monocrystalline Silicon Carbide",
Patent Number: 5,436,174, July 25, 1995.
(Non-RIE process for making trenches, demonstrated experimentally by PSRC/NCSU)
27 "Integrated Circuit Power Device with external disabling of Defective Devices and Method of Fabricating same",
Patent Number: 5,446,310, August 29, 1995.
(Third wafer scale defect repair technology for manufacturing high current devices demonstrated at PSRC/NCSU by using Al fusible links integrated with MOSFETs and IGBTs)
28 "Voltage Breakdown Resistant Monocrystalline Silicon Carbide Semiconductor Devices",
Patent Number: 5,449,925, September 12, 1995.
(Ion implanted high resistivity layers as ideal edge terminations for SiC Schottky Rectifiers, MOSFETs, or other devices demonstrated at PSRC/NCSU)
29 "Method of Fabricating High Voltage Silicon Carbide MESFETs",
Patent Number: 5,459,089, October 17, 1995.
(Method for fabrication of Lateral High Voltage MESFET structure for Power ICs)
30 "Dual Channel Emitter Switched Thyristor with Trench Gate",
Patent Number: 5, 471,075, November 28, 1995.
(Improved trench gate EST structure with MOS-gate controlled current saturation capability for high voltage applications)
31 "Latch-up Resistant Bipolar Transistor with Trench IGFET and Buried Collector",
Patent Number: 5,488,236, January 30, 1996.
(Trench gate IGBT with P+ region at trench bottom to suppress latch-up)
32 "Bidirectional AC Switching Device with MOS-Gated Turn-on and Turn-off Control",
Patent Number: 5,493,134, February 20, 1996.
(Monolithic vertical AC power switch with MOS-gate controlled current saturation in first and third quadrant for appliance control demonstrated at PSRC/NCSU)
33 "Silicon Carbide Semiconductor Devices having Buried Silicon Carbide Conduction Barrier Layers Therein",
Patent Number: 5,543,637, August 6, 1996.
(Includes the ACCUFET power MOSFET structure with very low specific on-resistance and low electric field in the gate oxide demonstrated at PSRC/NCSU. Also covers vertical JFETs and MESFETs with horizontal channel)
34 "Schottky Barrier Rectifiers and Method of Forming Same",
Patent Number: 5,612,567, March 18, 1997.
(Graded Doped Trench Schottky rectifier (GD-TMBS) demonstrated at PSRC/NCSU)
35 "Methods of Fabricating Voltage Breakdown Resistant Monocrystalline Silicon Carbide Semiconductor Devices",
Patent Number: 5,635,412, June 3, 1997.
(Self-Aligned method for fabricating Ion implanted high resistivity layers as ideal edge terminations demonstrated at PSRC/NCSU)
36 "Vertical Field Effect Transistors having improved Breakdown Voltage Capability and Low On-state Resistance",
Patent Number: 5,637,898, June 10, 1997.
(Graded doped vertical power MOSFET [GD-MOSFET] with gate electrode in deep trench for charge coupling)
37 "Depleted Base Transistor with High Forward Voltage Blocking Capability",
Patent Number: 5,679,966, October 21, 1997.
(Trench gate Accumulation channel silicon bipolar device with high voltage, high current density capability demonstrated using planar technology at PSRC/NCSU)
38 "Methods of Forming Silicon Carbide Semiconductor Devices having Buried Silicon Carbide Conduction Barrier Layers Therein",
Patent Number: 5,681,762, October 28, 1997.
(Methods for fabricating the ACCUFET power MOSFET structure with very low specific on-resistance and low electric field in the gate oxide demonstrated at PSRC/NCSU. Also covers vertical JFETs and MESFETs with horizontal channel.)
39 "Silicon Carbide Switching Devices having near ideal Breakdown Voltage Capability and Ultra-low On-state Resistance",
Patent Number: 5,742,076, April 21, 1998.
(Power MOSFETs with high dielectric constant gate insulators to prevent insulator breakdown)
40 "Static Induction Transistors having Heterojunction Gates and Methods of Forming Same",
Patent Number: 5,753,938, May 19, 1998.
(SiC SIT structure with Polysilicon as gate electrode.)
41 "Semiconductor Switching Devices having Buried Gate Electrodes and Methods of Forming Same",
Patent Number: 5,912,497, June 15, 1999.
(Novel unipolar and bipolar device with buried gate electrode)
42 "Methods of Forming Silicon Carbide Semiconductor Devices having Buried Silicon Carbide Conduction Barrier Layers Therein",
Patent Number: 5,950,076, September 7, 1999.
(More Methods for fabricating the ACCUFET power MOSFET structure with very low specific on-resistance and low electric field in the gate oxide demonstrated at PSRC/NCSU. Also covers vertical JFETs and MESFETs with horizontal channel.)
43 "Power Semiconductor Devices having improved High Frequency Switching and Breakdown Characteristics",
Patent Number: 5,998,833, December 7, 1999.
(Graded doped vertical power MOSFET [GD-MOSFET] with source electrode in deep trench for charge coupling partially demonstrated within RFFET at Silicon Wireless)
44 "Bidirectional Silicon Carbide Power Devices having Voltage Supporting Regions therein for providing improved Blocking Voltage Capability",
Patent Number: 6,023,078, February 8, 2000.
(Monolithic AC switch implemented in SiC with MOS gate control)
45 "Power Semiconductor Devices that utilize Buried Insulating Regions to achieve higher than Parallel-Plane Breakdown Voltage",
Patent Number: 6,075,259, June 13, 2000.
(Schottky rectifiers and power MOSFETs with buried insulators that allow for higher than parallel-plane breakdown voltage to achieve low on-resistance and leakage current)
46 "Methods of Forming Power Semiconductor Devices having T-shaped Gate Electrodes",
Patent Number: 6,303,410, October 16, 2001.
(Recessed gate MOSFET and IGBT structures using a combination of DMOS channel and UMOS accumulation layer path to achieve lower on-resistance with a planar process)
47 "Silicon Carbide Power Devices having Trench-based Silicon Carbide Charge Coupling Regions therein.",
Patent Number: 6,313,482, November 6, 2001.
(Low on-resistance SiC Schottky Rectifiers and power MOSFETs based up on forming P-type charge coupling regions within trenches formed around the N-type drift region)

 

 

 
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